时间：2020.1.7（星期二）上午9:00

地点：信科院624（原542）教室

报告人：彭亚锐，美国阿肯色大学计算机科学与工程系任助理教授

主持人：蒋斌

内容简介：

Abstract: As a leading contender of more-than-Moore technology, 2.5D/3D integrated circuits are built by stacking and connecting multiple chiplets with high-density inter-die vias. Heterogeneous integrated packaging is another promising solution to balance the performance, power, and cost tradeoff in processors, GPUs, FPGAs, and neural network accelerators. Such aggressive integration leads to many-fold improvements in interconnection length and design footprint. The industry is now working relentlessly to build advanced multi-chiplet packages that satisfy the ever-demanding memory bandwidth and energy efficiency requirements in datacenter servers, self-driving automobiles, and low-power mobile devices. However, the high-power devices packed under a small footprint raise various reliability concerns including power delivery, heat dissipation, and noise coupling. Advanced Computer-Aided Design (CAD) tools, algorithms, and models are essential to carefully analyze and efficiently address these challenging and complicated problems.

Another field that requires high-density and high-efficiency integration is power electronics. As a critical part of any electrical systems, power electronics design requires extensive knowledge of the device, circuit, package all the way to system and manufacturing. Designers need to understand electrical and thermal properties of materials, multi-physics design procedures, system control and optimization methodology, and the engineering art of design for manufacturability and reliability. Our research at the University of Arkansas targets both electrical and thermal issues altogether before an MCPM layout is finalized. A computer-aided design tool called PowerSynth is developed to further enrich the layout synthesis capability by introducing new algorithms and novel optimization methods for MCPM parasitic extraction, thermal modeling, heterogeneous integration, and reliability enhancement.

In this talk, I will present CAD and design techniques to enhance electro-power-thermal reliability of 2.5D and 3D ICs. First, I will introduce a CAD platform that evaluates and optimizes power and thermal reliability for 3D memory cubes and 3D multi-core processors. Next, I will present various methodologies for extracting and optimizing new parasitic elements in face-to-back and face-to-face 3D ICs as well as 2.5D wafer-level packages. I will conclude with our collaborative research with the NSF POETS center at the University of Arkansas on design automation for multi-chip power electronics. Our PowerSynth design automation platform integrates new modeling methods, heterogeneous components, 3D layouts, and pushes power electronics designs further toward high-power-density electronics systems enabling unprecedented productivity

报告人简介：

彭亚锐，1990年生，博士，现在美国阿肯色大学计算机科学与工程系任助理教授。2012年清华大学微电子所获学士学位，2014年和2016年自美国佐治亚理工大学电子与计算机工程系分获硕士和博士学位。主要研究方向为三维集成电路和碳化硅电力电路的计算机辅助设计自动化。博士阶段的工作主要在3D集成电路领域，系统性地提出了全套信号和电源完整性解决方案。针对堆叠异质结构和硅穿孔阵列提出物理模型算法，并对硅过孔和导线采用模式匹配算法，结合版图设计优化流程，设计实现了相应的噪声提取与版图优化工具，提升系统性能和信号完整性。针对双层键合结构，提出了耦合层提取算法，解决了多厂商知识产权保护问题，同时提高了提取精度。针对2.5D晶圆级封装，提出了基于环路电感的芯片封装共同提取算法，并实现了混合封装提取和版图优化工具。同时，针对堆叠存储器的电源完整性分析，提出了电源模型和系统性能统一分析工具。2017年入职阿肯色大学后，在电力电子领域实现了业界第一套功率模块电气和热稳定性版图优化工具。创造性地引入图算法和电路模型，实现了版图自动生成，自动优化，自动提取寄生参数和可靠性分析等功能。工作发表在顶级会议和刊物上并在SRC，ICPT和EPEPS等会议上获过最佳论文奖。

Yarui Peng received the B.S. degree from Tsinghua University, Beijing, China in 2012. He earned his M.S. degree and Ph.D. in School of Electrical and Computer Engineering from Georgia Institute of Technology, Atlanta, USA in 2014 and 2016, respectively. He joined the Department of Computer Science and Computer Engineering at the University of Arkansas as an assistant professor in Jan. 2017. He also works with the NSF sponsored Engineering Research Center for Power Optimization of Electro-Thermal Systems (POETS-erc.org).

His research interests are in the areas of computer-aided design, analysis, and optimization for emerging technologies and systems, such as 2.5D and 3D ICs, high band-gap power electronics and systems, and high-efficiency digital designs and memory systems. He developed methodologies and algorithms for parasitic extraction, analysis and optimization for signal integrity, and alleviating reliability issues in thermal and power delivery in 2.5D and 3D ICs. He is also working on improving electro-thermal reliability in power systems such as multi-chip power modules (MCPMs). He is the recipient of best-in-session award in SRC TECHCON 14 and best student paper award in ICPT 16.